Date: August 16, 2026
Gentian by cybiont extends vLLM inference and Megatron training on the NVIDIA multi-GPU servers an organisation already runs. Two public results, and a third thing that is new.
More context from the same eight GPUs
On eight NVIDIA B200 GPUs, Gentian served 1.3 million tokens in fp16 and fp32, with the
numerical gate passing at a residual of 7.23e-6 against a tolerance of 0.03. The conventional
all_gather path exhausted device memory at about half a million.
That is a capacity result, not a speed result.
Cache that holds as the corpus grows
On Llama-3.3-70B at TP=8 on eight NVIDIA H100 GPUs, the canonical policy held prefix-cache hit rate between 95.29% and 98.91% across a sweep from 10 to 48 documents, at the same 0.85 memory budget. Over that sweep the LRU baseline fell from 12.52% to 2.67–2.92%, the two replicates at 48 documents.
That is hit-rate stability, not throughput.
A transformer runs in the hardware
On AWS F2 (VU47P), the narrow-streaming mesh executes TinyLlama-1.1B end to end — all twenty-two decoder layers across four mesh nodes, with every sublayer in the datapath: RMSNorm, Q/K/V projections, RoPE, KV-cache writes, grouped-query attention, residuals, SwiGLU, then the final norm, logits projection and sampling. At 125 MHz, with post-route timing closed and zero failing endpoints of 1,096,820.
The token it emits matches the reference implementation exactly. That match is how a twenty-two-layer path is shown to be right end to end — it is the evidence, not the achievement.
It is a functional bring-up, not a performance vehicle: no throughput or latency figure follows from it. The distributed fold is host-orchestrated, using FPGA-produced observations — the fold does not run on the FPGA.
Nineteen macros at DRC-clean GDS
Nineteen logic macros taken to DRC-clean GDS on ASAP7, an academic 7 nm PDK, across 6.03 mm² of logic floorplan. Logic; SRAM black-boxed. Real physical-design evidence; not a tape-out.
Both embodiments produce correct output
Gentian is no longer supported by software-level reasoning alone. It runs on the GPUs a customer already owns, it runs a real language model in hardware, and its logic has been through physical implementation. "Do these invariants survive contact with silicon" stopped being a question and became two artefacts.
Software is what you can engage today. The hardware programme is longer-horizon research on the same design.
Enquiries
A scoped evaluation starts from one named workload: the model, the device count and topology, the constraint you are hitting now, and what would count as a result. The claim and its acceptance criteria are agreed in writing before integration work begins.
- Pilot and integration: pilot@cybiont.com
- Investor and strategic: investors@cybiont.com
- Research: research@cybiont.com
The Gentian page carries each result with its full measurement conditions. The signed response record verifies offline in two commands.